DocumentCode
1606129
Title
A method for measuring and alleviating clock-jitter in continuous-time Delta-Sigma modulators
Author
Jiang, Yanfeng ; Zhang, Xiaobo ; Yang, Bing
Author_Institution
Dept. of Microelectron., North China Univ. of Technol., Beijing, China
fYear
2009
Firstpage
567
Lastpage
570
Abstract
Continuous-time Delta-Sigma modulators are able to operate at higher frequencies than their discrete-time counterparts. However, they suffer more severely from non-idealities such as clock jitter. A method for measuring this clock jitter has been proposed. Moreover, the effect of the non-ideality are explained and a continuous-time to discrete-time conversion method is presented in order to aid in the analysis of this effect. The SC-R feedback circuit has been presented here to help eliminate clock jitter noise.
Keywords
circuit feedback; delta-sigma modulation; switched capacitor networks; timing jitter; SC-R feedback circuit; clock-jitter measurement; continuous time-to-discrete time conversion method; continuous-time delta-sigma modulator; Bandwidth; Clocks; Delta modulation; Educational institutions; Filters; Frequency; Jitter; Microelectronics; Sampling methods; Signal to noise ratio;
fLanguage
English
Publisher
ieee
Conference_Titel
Asian Control Conference, 2009. ASCC 2009. 7th
Conference_Location
Hong Kong
Print_ISBN
978-89-956056-2-2
Electronic_ISBN
978-89-956056-9-1
Type
conf
Filename
5276379
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