Title :
ASIC packaging directions
Author_Institution :
Toshiba America Electron. Components Inc., Sunnyvale, CA, USA
Abstract :
Past and predicted future trends in ASIC packaging are examined. Specific issues addressed include ASIC packaging complexity; pin count; surface mount technology; pin grid arrays; quad flat packs; land grid arrays; tape automated bonding; and multichip modules
Keywords :
application specific integrated circuits; multichip modules; packaging; surface mount technology; tape automated bonding; ASIC packaging; land grid arrays; multichip modules; packaging complexity; pin count; pin grid arrays; quad flat packs; surface mount technology; tape automated bonding; Application specific integrated circuits; CMOS technology; Electronic components; Electronics packaging; Frequency; Plastic packaging; Power dissipation; System performance; Voltage; Workstations;
Conference_Titel :
ASIC Conference and Exhibit, 1992., Proceedings of Fifth Annual IEEE International
Conference_Location :
Rochester, NY
Print_ISBN :
0-7803-0768-2
DOI :
10.1109/ASIC.1992.270198
