A new image encryption algorithm and its VLSI architecture

Author

Yen, Jui-Cheng ; Guo, Jiun-In

Author_Institution

Dept. of Electron. Eng., Nat. Lien-Ho Inst. of Technol., Miaoli, Taiwan

fYear

1999

fDate

6/21/1905 12:00:00 AM

Firstpage

430

Lastpage

437

Abstract

In this paper, a new image encryption algorithm and its VLSI architecture are proposed. Based on a defined bit recirculation function and a binary sequence generated from a chaotic system, the gray level of each pixel in the image is transformed. The features of the algorithm are as follows: 1) low computational complexity, 2) high security, and 3) no distortion. In order to implement the system, its VLSI architecture with low hardware complexity, high computing speed, and high feasibility for VLSI implementation is also designed. Finally, two encrypted images are simulated and the fractal dimensions of the original and encrypted images are computed to demonstrate the effectiveness of the proposed algorithm

Keywords

VLSI; computational complexity; cryptography; image processing; VLSI architecture; binary sequence; chaotic system; computing speed; defined bit recirculation function; encrypted image simulation; fractal dimensions; high security; image encryption algorithm; low computational complexity; low hardware complexity; pixel gray level; Binary sequences; Chaos; Computational complexity; Computational modeling; Computer architecture; Cryptography; Hardware; Pixel; Security; Very large scale integration;

fLanguage

English

Publisher

ieee

Conference_Titel

Signal Processing Systems, 1999. SiPS 99. 1999 IEEE Workshop on

Conference_Location

Taipei

ISSN

1520-6130

Print_ISBN

0-7803-5650-0

Type

conf

DOI

10.1109/SIPS.1999.822348

Filename

822348