DocumentCode
1606508
Title
Evidence of the Prominent Role of the Time-Under-Melt Parameter in the Reset Switching of Phase-Change Line Cells
Author
Goux, L. ; Gille, T. ; Castro, D. Tio ; Hurkx, G.A.M. ; Lisoni, J.G. ; Delhougne, R. ; Gravesteijn, D.J. ; Meyer, K. De ; Attenborough, K. ; Wouters, D.J.
Author_Institution
IMEC, Leuven
fYear
2008
Firstpage
37
Lastpage
38
Abstract
The resistive-switching phase-change memory (PCM) is gaining increasing interest as a potential flash replacement, mainly due to scalability, faster writing and better endurance. PCM cells are typically programmed to the high- resistive amorphous state using a high current pulse (reset programming), and to the low-resistive crystalline state using a longer pulse of lower amplitude (set programming). The parameters considered to mainly control reset switching are the reset current IR, sufficiently high to reach the melt temperature Tm of the PCM material, and the quench time tq, short enough to freeze-in the melt state. The optimization of these parameters, as demonstrated for Ge2Sb2Te5-based vertical cells in the literature (D. Mantagazza et al., 2006), (T. Nirschi et al., 2007), is thus a key to better control the switching of the cell. In the present work the influence of the pulse parameters on the reset state is investigated for a SbTe-based lateral cell. A new phenomenon affecting the resistance of the amorphous phase after reset is identified and a strong influence of the time-under-melt parameter is demonstrated.
Keywords
antimony compounds; crystals; germanium compounds; phase change materials; programming; semiconductor storage; Ge2Sb2Te5; high-resistive amorphous state; low-resistive crystalline state; phase-change memory; reset programming; reset switching; time-under-melt parameter; Amorphous materials; Crystalline materials; Crystallization; Electric resistance; Numerical simulation; Phase change materials; Phase change memory; Scalability; Temperature control; Writing;
fLanguage
English
Publisher
ieee
Conference_Titel
Non-Volatile Semiconductor Memory Workshop, 2008 and 2008 International Conference on Memory Technology and Design. NVSMW/ICMTD 2008. Joint
Conference_Location
Opio
Print_ISBN
978-1-4244-1546-5
Electronic_ISBN
978-1-4244-1547-2
Type
conf
DOI
10.1109/NVSMW.2008.16
Filename
4531816
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