Title :
VLSI implementation issues of TURBO decoder design for wireless applications
Author :
Wang, Zhongfeng ; Suzuki, Hiroshi ; Parhi, Keshab K.
Author_Institution :
Dept. of Electr. & Comput. Eng., Minnesota Univ., Minneapolis, MN, USA
fDate :
6/21/1905 12:00:00 AM
Abstract :
Finite precision effects on the performance of TURBO decoders have been analyzed and the optimal word lengths of variables have been determined considering tradeoffs between the performance and the hardware cost. It is shown that the performance degradation from the infinite precision is negligible if 4 bits are used for received bits and 6 bits for the extrinsic information. The state metrics normalization method suitable for TURBO decoders is also discussed. This method requires small amount of hardware and its speed does not depend on the number of states. Furthermore, we propose novel power-down techniques, which can achieve very high power-down efficiency without performance or latency degradation at the expense of negligible hardware overhead
Keywords :
VLSI; code division multiple access; decoding; performance evaluation; TURBO decoder design; VLSI implementation; hardware cost; hardware overhead; performance; performance degradation; state metrics normalization; wireless applications; Application software; Bit error rate; Cost function; Degradation; Energy consumption; Hardware; Iterative decoding; Performance analysis; Turbo codes; Very large scale integration;
Conference_Titel :
Signal Processing Systems, 1999. SiPS 99. 1999 IEEE Workshop on
Conference_Location :
Taipei
Print_ISBN :
0-7803-5650-0
DOI :
10.1109/SIPS.1999.822356