Concurrent design of a chipset and its runtime environment

During the design of an accelerator board with two different ASICs, a methodology for the concurrent design of a chipset and a software system working as a runtime environment has been developed. The software system is implemented in the most appropriate language, e.g. C, and the board is modeled in a hardware description language, e.g. VHDL. A portable software library in C and VHDL was developed to allow the VHDL simulation process and the runtime system to exchange stimuli and results concurrently. This approach addresses the limitations of the VHDL standard testbench concept