A novel VLSI architecture for a variable-length key, 64-bit Blowfish block cipher

Author

Lai, Yeong-Kang ; Shu, Yu-Chuan

Author_Institution

Dept. of Comput. Sci. & Inf. Eng., Nat. Dong-Hua Univ., Taiwan

fYear

1999

fDate

6/21/1905 12:00:00 AM

Firstpage

568

Lastpage

577

Abstract

A novel one-round VLSI architecture of the block cipher, Blowfish, for data encryption/decryption has been presented. Based on a pipelined structure, efficient key management, and the mapping of the algorithm onto the data path the performance of the architecture can be increased. In addition, all important standardised modes of operation of block ciphers, such as ECB, CBC, and OFB, are also supported. Due to the properties of low cost, high throughput rate, and scalable encryption, the VLSI block cipher provides efficient solutions for data encryption such as wireless communication application

Keywords

VLSI; application specific integrated circuits; cryptography; digital signal processing chips; 64 bit; 64-bit blowfish block cipher; CBC; ECB; OFB; VLSI architecture; VLSI block cipher; data encryption; data path; decryption; efficient key management; global networking; mobile computing; one-round VLSI architecture; pipelined structure; scalable encryption; variable-length key; wireless communication; Computer architecture; Computer science; Costs; Cryptography; Data security; Protection; Public key; Throughput; Very large scale integration; Wireless communication;

fLanguage

English

Publisher

ieee

Conference_Titel

Signal Processing Systems, 1999. SiPS 99. 1999 IEEE Workshop on

Conference_Location

Taipei

ISSN

1520-6130

Print_ISBN

0-7803-5650-0

Type

conf

DOI

10.1109/SIPS.1999.822363

Filename

822363