Title :
A novel hardware algorithm for residue evaluation
Author :
Karagianni, K. ; Stouraitis, T.
Author_Institution :
Dept. of Electr. & Comput. Eng., Patras Univ., Greece
fDate :
6/21/1905 12:00:00 AM
Abstract :
An efficient hardware algorithm for the conversion of an integer X to its residue module a predefined integer m, is introduced. The algorithm is based on successive subtractions of appropriately selected multiples of m, from the input X, and it leads to fast evaluation of the residue, via hardware of low complexity. A VLSI architecture for the implementation of the algorithm is also proposed
Keywords :
VLSI; computational complexity; residue number systems; VLSI architecture; hardware algorithm; low complexity; residue evaluation; residue module; successive subtractions; Algorithm design and analysis; Costs; Cryptography; Hardware; Laboratories; Signal processing algorithms; Table lookup; Very large scale integration;
Conference_Titel :
Signal Processing Systems, 1999. SiPS 99. 1999 IEEE Workshop on
Conference_Location :
Taipei
Print_ISBN :
0-7803-5650-0
DOI :
10.1109/SIPS.1999.822374
