Title :
VLSI focal-plane array processor for morphological image processing
Author :
Fang, Wai-Chi ; Shaw, Timothy ; Yu, Jeffrey
Author_Institution :
Jet Propulsion Lab., California Inst. of Technol., Pasadena, CA, USA
Abstract :
A full-custom mixed-signal VLSI design for high-speed morphological image processing is developed by combining a two-dimensional fine-grain parallel array architecture with on-chip focal-plane photodetectors and transmitters. An 8×8 array processor prototype chip is designed in a 1.2-mm×1.2-mm silicon area using the MOSIS 2-μm CMOS process
Keywords :
CMOS integrated circuits; VLSI; digital signal processing chips; image processing equipment; image sensors; mixed analogue-digital integrated circuits; parallel architectures; photodetectors; 2 micron; 2D fine grain architecture; ASIC; CMOS process; MOSIS; focal-plane array processor; full-custom; mixed-signal VLSI design; morphological image processing; parallel array architecture; photodetectors; transmitters; two-dimensional; CMOS process; Circuits; High speed optical techniques; Image processing; Optical sensors; Optical transmitters; Photodetectors; Surface morphology; Very large scale integration; Workstations;
Conference_Titel :
ASIC Conference and Exhibit, 1992., Proceedings of Fifth Annual IEEE International
Conference_Location :
Rochester, NY
Print_ISBN :
0-7803-0768-2
DOI :
10.1109/ASIC.1992.270255
