Title :
SGRED-a symbolic graphics editor for VLSI layout
Author :
Taneja, S. ; Schuyler, S.T. ; Wang, S. ; Angelina, H.M.
Author_Institution :
AT&T Bell Lab., Murray Hill, NJ, USA
Abstract :
An overview is presented of SGRED, a third-generation connectivity-based symbolic layout editor for integrated circuits. The major problems with existing layout editors and their adverse impact on custom cell designers are presented. The unique editing features in SGRED, which solve many of these problems, are then described. Some of these features include: electrical connectivity checks, automatic contact generation, ability to place and automatically connect cell instances, hierarchical net tracing, and supporting multiple views of a circuit. A summary is presented of the fast turnaround times achieved by chip designers using this editor
Keywords :
VLSI; circuit layout CAD; computer graphics; SGRED; VLSI layout; automatic contact generation; automatically connect cell instances; cell placement; connectivity-based symbolic layout editor; editing features; electrical connectivity checks; fast turnaround times; full custom layout; hierarchical net tracing; layout editors; overview; supporting multiple views; symbolic graphics editor; third generation layout editor; Buildings; Contacts; Delay; Design automation; Graphics; Integrated circuit layout; Job design; Resistors; Very large scale integration; Wires;
Conference_Titel :
Circuits and Systems, 1989., IEEE International Symposium on
Conference_Location :
Portland, OR
DOI :
10.1109/ISCAS.1989.100280
