DocumentCode
1607679
Title
Achieving low-cost high-reliability computation through redundant parallel processing
Author
McLoughlin, I.V. ; Bretschneider, T.
Author_Institution
Mission Technol. Ltd., Christchurch, New Zealand
fYear
2006
Firstpage
1
Lastpage
6
Abstract
This paper presents a reconfigurable parallel architecture comprising an FPGA backbone and multiple processing nodes connected in a redundant array architecture and constructed mainly from low-cost commercial components. The reconfigurability of the backbone aids in allowing the system to operate as a fault-tolerant cluster utilising the principle of reliability through redundancy. Although initially designed for space-borne on-board processing of satellite imagery, the system combines the advantages of powerful computational resources with simplified software development. This makes the computer a useful general-purpose embedded processing block for critical computational tasks where fault-tolerance and high processing capabilities are required.
Keywords
fault tolerant computing; field programmable gate arrays; parallel architectures; reconfigurable architectures; satellite computers; FPGA; fault-tolerant cluster; general-purpose embedded processing block; parallel processing; reconfigurable parallel architecture; redundant array architecture; satellite imagery; software development; space-borne on-board processing; Computer architecture; Concurrent computing; Embedded computing; Fault tolerant systems; Field programmable gate arrays; Parallel architectures; Parallel processing; Power system reliability; Redundancy; Spine;
fLanguage
English
Publisher
ieee
Conference_Titel
Computing & Informatics, 2006. ICOCI '06. International Conference on
Conference_Location
Kuala Lumpur
Print_ISBN
978-1-4244-0219-9
Electronic_ISBN
978-1-4244-0220-5
Type
conf
DOI
10.1109/ICOCI.2006.5276450
Filename
5276450
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