Full integration and cell characteristics for 64Mb nonvolatile PRAM

Author

Lee, S.-H. ; Hwang, Y.N. ; Lee, S.Y. ; Ryoo, K.C. ; Ahn, S.J. ; Koo, Hyun Cheol ; Jeong, C.W. ; Kim, Kinam ; Koh, G.H. ; Jeong, G.T. ; Jeong, H.S. ; Kinam Kim

Author_Institution

Adv. Technol. Dev., Samsung Electron. Co. Ltd., Kyunggi-Do, South Korea

fYear

2004

Firstpage

20

Lastpage

21

Abstract

We have integrated a 64Mb nonvolatile random access memory using phase transition phenomena. Based on 0.18μm-CMOS technologies, the vertical contact typed memory cell is fabricated. The device density can be sharply increased with decreasing the writing current and the GST size. But for reduction of writing current, issues including set and interface resistances should be stabilized. Additionally, our results also show the feasibility of 256Mb nonvolatile PRAM with writing time below 100ns.

Keywords

CMOS integrated circuits; random-access storage; 0.18 micron; 0.18μm-CMOS technologies; 100 ns; 256 Mbit; 64 Mbit; 64Mb nonvolatile PRAM; cell characteristics; full integration characteristics; nonvolatile random access memory; phase transition phenomena; CMOS technology; Circuit testing; Computer aided engineering; Costs; Crystallization; Driver circuits; Electrodes; Nonvolatile memory; Phase change random access memory; Writing;

fLanguage

English

Publisher

ieee

Conference_Titel

VLSI Technology, 2004. Digest of Technical Papers. 2004 Symposium on

Print_ISBN

0-7803-8289-7

Type

conf

DOI

10.1109/VLSIT.2004.1345369

Filename

1345369