• DocumentCode
    1608135
  • Title

    GaN HEMT based high efficiency push-pull inverse class-F power amplifier using chip-on-board technique

  • Author

    Park, Jun-Chul ; Yoo, Chan-Sei ; Kang, Wonshil ; Kim, Dongsu ; Yook, Jong-Gwan ; Lee, Woo Sung

  • Author_Institution
    Electron. Mater. & Device Res. Center, Korea Electron. Technol. Inst. (KETI), Seongnam, South Korea
  • fYear
    2011
  • Firstpage
    522
  • Lastpage
    525
  • Abstract
    This paper presents a high efficiency push-pull inverse class-F (class-F-1) power amplifier (PA) using a gallium nitride (GaN) transistor for class-S system - a digitally controlled by delta-sigma modulation. To enhance a drain efficiency of class-F-1 PA, the chip-on-board (COB) technique, which can reduce the external parasitic components of the packaged transistor and allow fast switching operation at high frequencies by minimizing distortion of the pulse waveform, is adopted. A harmonic control circuit considering output intrinsic parameters of the transistor from switch-based model controls harmonics to extract pure fundamental frequency of the output signal. For a high efficiency push-pull operation, low loss rat-race baluns are integrated at input and output circuits. From the measured results for a continuous wave of 3.3 GHz, the class-F-1 PA shows a maximum output power of 35.5 dBm and a power gain of about 10 dB. Also, the proposed PA provides a high power-added-efficiency (PAE) of 64.2% and a drain efficiency of 77.2% at maximum output power. The drain efficiency is still remained over 75% in the frequency range of 100 MHz.
  • Keywords
    HEMT integrated circuits; III-V semiconductors; MMIC power amplifiers; baluns; delta-sigma modulation; differential amplifiers; field effect MMIC; gallium compounds; harmonic distortion; high electron mobility transistors; wide band gap semiconductors; GaN; HEMT; PAE; baluns; chip-on-board technique; class-F-1 PA; delta-sigma modulation; digitally controlled class-S system; drain efficiency enhancement; frequency 3.3 GHz; gallium nitride transistor; harmonic control circuit; high efficiency push-pull inverse class-F power amplifier; output intrinsic parameters; packaged transistor external parasitic component reduction; power added efficiency; power gain; pulse waveform distortion minimization; switch-based model; Gallium nitride; Harmonic analysis; Impedance matching; Integrated circuit modeling; Power amplifiers; Switching circuits; Transistors; Class-S; gallium nitride (GaN); inverse class-F; push-pull structure;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Microwave Conference Proceedings (APMC), 2011 Asia-Pacific
  • Conference_Location
    Melbourne, VIC
  • Print_ISBN
    978-1-4577-2034-5
  • Type

    conf

  • Filename
    6173802