Title :
A 65nm-node LSTP (Low standby power) poly-Si/a-Si/HfSiON transistor with high Ion-Istandby ratio and reliability
Author :
Yasuda, Y. ; Kimizuka, N. ; Iwamoto, Takuya ; Fujieda, Shun ; Ogura, Tsuneo ; Watanabe, Hiromi ; Tatsumi, Taizo ; Yamamoto, Ichiro ; Ito, Kei ; Watanabe, Hiromi ; Yamagata, Yoshiki ; Imai, Koichi
Author_Institution :
Adv. Device Dev. Div., NEC Electron. Corp., Kanagawa, Japan
Abstract :
We have newly developed poly-Si/a-Si/HfSiON (EOT=1.6nm) transistor that features high Ion-Istandby ratio and reliability for 65nm-node LSTP (Low Standby Power) application. By carefully optimizing halo implant condition, excellent Ion-Istandby (=IgIoff) characteristics of Ion=520μA/Istandby=17pA (Ig=1.6pA, Ioff= 15pA) at Vdd=1.2V are obtained, which is the highest ratio ever reported. In addition, we have newly introduced thin amorphous-Si layer between HfSiON and phosphorous-doped poly-Si gate-electrode for reliability enhancement, and confirmed that PBTI (positive bias temperature instability) lifetime improves by two orders of magnitude with no performance degradation. We believe this technology enables further device scaling of poly-Si/HfSiON structure.
Keywords :
MISFET; VLSI; amorphous semiconductors; elemental semiconductors; hafnium compounds; nanotechnology; silicon; 65 nm; 65nm-node LSTP; Low Standby Power; Si-HfSiON; halo implant condition; poly-Si/a-Si/HfSiON transistor; reliability; Capacitance; Capacitors; Degradation; Doping; Electrodes; High K dielectric materials; High-K gate dielectrics; Impurities; Leakage current; Very large scale integration;
Conference_Titel :
VLSI Technology, 2004. Digest of Technical Papers. 2004 Symposium on
Print_ISBN :
0-7803-8289-7
DOI :
10.1109/VLSIT.2004.1345381
