Grouping variables into multiport memories for ASIC data path synthesis

Author

Ahmad, Imtiaz ; Chen, C. Y Roger

Author_Institution

Dept. of Electr. & Comput. Eng., Syracuse Univ., NY, USA

fYear

1992

Firstpage

162

Lastpage

165

Abstract

Grouping variables into multiport memories is an essential step for multiport memory based data path synthesis. The proposed system, GMD, not only groups variables into a minimum number of multiport memory modules, but also simultaneously minimizes the number of registers in each memory module. The minimization problem is formulated as a 0-1 integer linear programming (ILP) problem. Experiments on benchmarks are promising

Keywords

application specific integrated circuits; integer programming; linear programming; logic CAD; modules; multiport networks; random-access storage; 0-1 integer linear programming; ASIC data path synthesis; GMD; memory module; minimization problem; multiport memories; registers; Application specific integrated circuits; Computer architecture; Digital signal processors; Integer linear programming; Random access memory; Read-write memory; Reduced instruction set computing; Registers; Throughput; Very large scale integration;

fLanguage

English

Publisher

ieee

Conference_Titel

ASIC Conference and Exhibit, 1992., Proceedings of Fifth Annual IEEE International

Conference_Location

Rochester, NY

Print_ISBN

0-7803-0768-2

Type

conf

DOI

10.1109/ASIC.1992.270286

Filename

270286

Link To Document

https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=1608410