Title :
An incremental synthesis method for ASIC design
Author :
Giomi, Jean-Charles
Author_Institution :
COMPASS Design Autom., Inc., San Jose, CA, USA
Abstract :
An incremental synthesis method which enables ASIC designers to incrementally modify their register-transfer-level (RTL) behavior descriptions is described. This synthesis method synthesizes and optimizes only RTL behaviors which have been modified. An incremental synthesis approach reduces the overall synthesis time when an incremental modification has been performed. This synthesis method allows ASIC designers to control the design space exploration more closely
Keywords :
application specific integrated circuits; logic CAD; logic arrays; ASIC design; behavior descriptions; design space exploration; incremental synthesis method; overall synthesis time; register transfer level; Application specific integrated circuits; Circuit synthesis; Design automation; Design methodology; Hardware design languages; Libraries; Optimization methods; Space exploration; Synthesizers; Timing;
Conference_Titel :
ASIC Conference and Exhibit, 1992., Proceedings of Fifth Annual IEEE International
Conference_Location :
Rochester, NY
Print_ISBN :
0-7803-0768-2
DOI :
10.1109/ASIC.1992.270287
