ASIC implementation of a 16-kbps waveform coder using adaptive vector quantization

Author

Ardalan, Shahryar S. ; Martin, Harold L. ; Wang, Tzung K. ; Stuart, Carson

Author_Institution

Dept. of Electr. Eng., North Carolina A&T State Univ., Greensboro, NC, USA

fYear

1992

Firstpage

72

Lastpage

75

Abstract

The development of an adaptive vector quantizer (AVQ) codec chip using Open Architecture Silicon Implementation System (OASIS) tools is described. The goal is development of a 16-kb/s AVQ coder prototype system which can be used as an alternative to the currently used 32-kb/s adaptive delta pulse code modulation (ADPCM). The AVQ semicustom chip layout uses 1.2-μm CMOS technology, and consists of 157,191 transistors. The AVQ system is being designed with Mentor Graphics CAD tools and is a four-layer PC board encompassing over 60 analog and digital components

Keywords

CMOS integrated circuits; application specific integrated circuits; circuit CAD; codecs; vector quantisation; 1.2 micron; 16 kbit/s; CMOS technology; Mentor Graphics CAD tools; OASIS tools; Open Architecture Silicon Implementation System; adaptive vector quantization; codec; four-layer PC board; semicustom chip layout; waveform coder; Application specific integrated circuits; CMOS technology; Codecs; Delta modulation; Graphics; Layout; Modulation coding; Prototypes; Pulse modulation; Silicon;

fLanguage

English

Publisher

ieee

Conference_Titel

ASIC Conference and Exhibit, 1992., Proceedings of Fifth Annual IEEE International

Conference_Location

Rochester, NY

Print_ISBN

0-7803-0768-2

Type

conf

DOI

10.1109/ASIC.1992.270304

Filename

270304