A novel MNOS technology using gate hole injection in erase operation for embedded nonvolatile memory applications

Author

Ito, F. ; Kawashima, Y. ; Sakai, T. ; Kanamaru, Y. ; Ishii, Y. ; Mizuno, M. ; Hashimoto, T. ; Ishimaru, Tetsuya ; Mine, T. ; Matsuzaki, N. ; Kume, H. ; Tanaka, T. ; Shinagawa, Y. ; Toya, T. ; Okuyama, K. ; Kuroda, K. ; Kubota, K.

Author_Institution

Renesas Technol. Corp., Ibaraki, Japan

fYear

2004

Firstpage

80

Lastpage

81

Abstract

A novel MNOS memory with gate hole injection in erase operation has been demonstrated for embedded nonvolatile memory applications. Superior characteristics with 10μsec programming and 10msec erasing speed were obtained as compared with conventional MONOS structures. In addition, we found that the localized interface trap at source side region was generated by excess holes during erasing cycle and could be suppressed by Lg scaling. This result shows the good scalability of this technology.

Keywords

MISFET; VLSI; interface states; nanotechnology; semiconductor storage; 10 ms; 10 mus; MNOS technology; embedded nonvolatile memory applications; erase operation; erasing speed; gate hole injection; localized interface trap; source side region; Character generation; Circuits; Degradation; Electrodes; Electrons; MONOS devices; Nonvolatile memory; Scalability; Silicon compounds; Voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

VLSI Technology, 2004. Digest of Technical Papers. 2004 Symposium on

Print_ISBN

0-7803-8289-7

Type

conf

DOI

10.1109/VLSIT.2004.1345404

Filename

1345404