Title :
Concurrent test of Network-on-Chip interconnects and routers
Author :
Hervé, Marcos ; Almeida, Pedro ; Kastensmidt, Fernanda Lima ; Cota, Erika ; Lubaszewski, Marcelo
Author_Institution :
Inst. de Inf., Univ. Fed. do Rio Grande do Sul, Porto Alegre, Brazil
Abstract :
In this work, a functional-based test method is presented that integrates the test of Network-on-Chip interconnects and routers. The proposed approach is scalable to any size of network. Experimental results show that fault coverage can reach up to 100% of interconnect faults and 92.75% of router faults, with yet affordable test sequence lengths.
Keywords :
electrical faults; integrated circuit interconnections; integrated circuit testing; network routing; network-on-chip; fault coverage; functional-based test method; interconnect faults; network-on-chip interconnects; router faults; test sequence lengths; Clocks; Integrated circuit interconnections; Magnetic cores; Nickel; Routing; Testing; Wires;
Conference_Titel :
Test Workshop (LATW), 2010 11th Latin American
Conference_Location :
Pule del Este
Print_ISBN :
978-1-4244-7786-9
Electronic_ISBN :
978-1-4244-7785-2
DOI :
10.1109/LATW.2010.5550355
