DocumentCode :
1609018
Title :
Phase-jitter dynamics of second-order digital phase-locked loops
Author :
Rogers, Alan ; Teplinsky, Alexey ; Feely, Orla
Author_Institution :
Dept. of Electron. & Electr. Eng., Univ. Coll. Dublin, Ireland
Volume :
3
fYear :
1998
Firstpage :
350
Abstract :
Recent studies of digital phase-locked loops by Gardner have shown that an unwanted phase `jitter´ occurs in such systems, due to frequency quantisation in a number-controlled oscillator. In a previous paper, we used techniques from the theory of nonlinear dynamics to verify Gardner´s empirical results and to illuminate the behaviour of first- and second-order loops. In this paper we shall expand on that work; in particular, we shall consider both the transient and steady-state dynamic behaviour of the second-order DPLL and describe the motion of steady-state trajectories when the input frequency is rational
Keywords :
digital phase locked loops; jitter; nonlinear dynamical systems; nonlinear network analysis; first-order loops; frequency quantisation; input frequency; number-controlled oscillator; phase-jitter dynamics; second-order DPLL; second-order digital phase-locked loops; second-order loops; steady-state dynamic behaviour; steady-state trajectories; theory of nonlinear dynamics; transient dynamic behaviour; Clocks; Control systems; Detectors; Equations; Frequency; Jitter; Limit-cycles; Phase detection; Phase locked loops; Steady-state;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Circuits and Systems, 1998. ISCAS '98. Proceedings of the 1998 IEEE International Symposium on
Conference_Location :
Monterey, CA
Print_ISBN :
0-7803-4455-3
Type :
conf
DOI :
10.1109/ISCAS.1998.704022
Filename :
704022
Link To Document :
بازگشت