DocumentCode
1609188
Title
Formal models for system design (challenges on exchanges in the main role between hardware and software going to the systems packaging)
Author
Ivanov, Ivan Evgeniev ; Georgiev, Vesselin Evgeniev
Author_Institution
Tech. Univ. of Sofia, Bulgaria
Volume
3
fYear
2004
Firstpage
564
Abstract
This paper envisages main trends in systems design. Observation over and comparison between paradigms in software and hardware design is presented. Finally the paper focuses on three of most popular and important hardware design languages VHDL, SDL and SystemC. A special stress is done on how do they work outside hardware design and how they do package software and hardware in one device.
Keywords
hardware description languages; hardware-software codesign; specification languages; SDL; SystemC; VHDL; formal models; hardware design; hardware design languages; hardware-software role exchanges; hardware/software co-design; software design; system design; systems packaging; Computer science; Design automation; Design methodology; Electronic circuits; Electronics packaging; Hardware design languages; Object oriented modeling; Power system modeling; Software packages; Stress;
fLanguage
English
Publisher
ieee
Conference_Titel
Electronics Technology: Meeting the Challenges of Electronics Technology Progress, 2004. 27th International Spring Seminar on
Print_ISBN
0-7803-8422-9
Type
conf
DOI
10.1109/ISSE.2004.1490879
Filename
1490879
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