Title :
Extended scaling of ultrathin gate oxynitride toward sub-65nm CMOS by optimization of UV photo-oxidation, soft plasma/thermal nitridation & stress enhancement
Author :
Chi-Chun Chen ; Chang, V.S. ; Jin, Y. ; Chen, C.H. ; Lee, T.L. ; Chen, S.C. ; Liang, M.S.
Author_Institution :
Adv. Module Technol. Div., Taiwan Semicond. Manuf. Co., Hsin-Chu, Taiwan
Abstract :
A novel UV photo-oxidation (UVPO) is developed for ideal "atomic-layer oxidation" with excellent thickness control down to 4Å, which is very promising for interfacial layer formation of scaled gate oxynitride and high-k applications. In addition, ultrathin oxynitride (EOT<12Å) using a newly-developed low ion-energy nitrogen plasma (30% plasma damage reduction) in combination with thermal nitridation is demonstrated for n/pMOSFET performance optimization. Finally, device performance is further enhanced (+7% of nFET Ion-Ioff by tensile stress with negligible impact on pFET) by mechanical stress modulation from strain contact-etch-stop layer (CESL). The proposed technologies represent an efficient approach to realize ultrathin gate oxynitride toward sub-65nm CMOS production.
Keywords :
CMOS integrated circuits; MOSFET; nanotechnology; nitridation; oxidation; 65 nm; MOSFET; UV photo-oxidation; atomic-layer oxidation; extended scaling; soft plasma/thermal nitridation; stress enhancement; sub-65nm CMOS; thickness control; ultrathin gate oxynitride; Atomic layer deposition; High K dielectric materials; High-K gate dielectrics; MOSFET circuits; Nitrogen; Oxidation; Plasma applications; Plasma devices; Thermal stresses; Thickness control;
Conference_Titel :
VLSI Technology, 2004. Digest of Technical Papers. 2004 Symposium on
Print_ISBN :
0-7803-8289-7
DOI :
10.1109/VLSIT.2004.1345464
