Title :
Dual work function metal gate CMOS using CVD metal electrodes
Author :
Narayanan, V. ; Callegari, A. ; McFeely, F.R. ; Nakamura, K. ; Jamison, P. ; Zafar, S. ; Cartier, E. ; Steegen, A. ; Ku, V. ; Nguyen, P. ; Milkove, K. ; Cabral, C. ; Gribelyuk, N. ; Wajda, C. ; Kawano, Y. ; Lacey, D. ; Li, Y. ; Sikorski, E. ; Duch, E. ; N
Author_Institution :
Semicond. Res. & Dev. Center, IBM, Hopewell Junction, NY, USA
Abstract :
Dual workfunction metal gated MOSFETs with CVD TaSiN, W and Re have been fabricated on HfO2. Tinv as low as 1.46 nm with appropriate Vts and sub-threshold slopes 90 mV/decade or better have been achieved. For the first time we report low damage CVD processes for achieving dual workfunction metal gates in contrast to most reports in literature. Excellent hole mobility has been obtained for aggressive stacks. It is further observed that electron mobility optimization is critically dependent on specific electrode and interface layer combinations along with post deposition processing even for nominally identical HfO2 layers.
Keywords :
CMOS integrated circuits; CVD coatings; MOSFET; electron mobility; hafnium compounds; hole mobility; rhenium; silicon compounds; tantalum compounds; tungsten; work function; 1.46 nm; CVD metal electrodes; HfO2; MOSFETs; Re; TaSiN; W; dual work function metal gate CMOS; electron mobility optimization; Annealing; Charge pumps; Electrodes; Electron mobility; High K dielectric materials; High-K gate dielectrics; Jamming; Leakage current; MOSFETs; Research and development;
Conference_Titel :
VLSI Technology, 2004. Digest of Technical Papers. 2004 Symposium on
Print_ISBN :
0-7803-8289-7
DOI :
10.1109/VLSIT.2004.1345473
