DocumentCode :
161087
Title :
CLM effect for 28nm stacked HK nmosfets after DPN treatment with different annealing temperatures
Author :
Shea-Jue Wang ; Chao-Wang Li ; Win-Der Lee ; Kuan-Ho Chen ; Cheng, Osbert ; Huang, L.S. ; Mu-Chun Wang
Author_Institution :
Dept. of Mater. & Resources Eng., Nat. Taipei Univ. of Technol., Taipei, Taiwan
fYear :
2014
fDate :
7-10 May 2014
Firstpage :
1
Lastpage :
4
Abstract :
In this work, it can be seen that the effect of channel length modulation for NMOSFETs under high-k/metal gate deposition depicts a minor deviation with different nitridation annealing temperatures. This consequence, however, strongly correlates to the channel length and the gate voltage playing as a vertical field. As the channel length is narrowed down, the horizontal field coming from drain voltage on the channel is increased more and compresses the effective channel length, reflecting on the Early voltage VA. In the past, all of ID vs. VD curves after extrapolation would approach an identical intersection point. But this phenomenon should be modified more right now.
Keywords :
MOSFET; annealing; atomic layer deposition; high-k dielectric thin films; nitridation; plasma deposition; CLM effect; DPN treatment; atomic layer deposition; channel length modulation effect; decoupled plasma nitridation process; drain voltage; early effect; extrapolation; gate voltage; high-k-metal gate deposition; horizontal field; identical intersection point; nitridation annealing temperatures; stacked HK NMOSFETs; vertical field; Annealing; Dielectrics; Gate leakage; High K dielectric materials; Logic gates; MOSFET; Metals; CLM effect; decoupled plasma nitridation; gate dielectric; high-k; metal gate; strained engineering;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Next-Generation Electronics (ISNE), 2014 International Symposium on
Conference_Location :
Kwei-Shan
Type :
conf
DOI :
10.1109/ISNE.2014.6839327
Filename :
6839327
Link To Document :
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