• DocumentCode
    161101
  • Title

    Optimal page allocation approach on the hybrid DRAM/PCRAM memory architecture

  • Author

    Wei-Kai Cheng ; Jhih-Kai Yang

  • Author_Institution
    Dept. of Inf. & Comput. Eng., Chung Yuan Christian Univ., Chungli, Taiwan
  • fYear
    2014
  • fDate
    7-10 May 2014
  • Firstpage
    1
  • Lastpage
    2
  • Abstract
    Non-volatile memory has the advantages of non-volatility, circuit density and ignorable leakage power. However, it suffers from the bad write latency and poor write power consumption. In this paper, we propose a page allocation approach on the hybrid DRAM/PCRAM memory structure. By dividing a task into page segments, we can further taking the advantages of good leakage consumption of PCRAM and short write latency of DRAM. Experimental results show that our page-based approach performs better than the task-based approach in terms of both latency and power consumption.
  • Keywords
    DRAM chips; memory architecture; phase change memories; power consumption; bad write latency; circuit density; hybrid DRAM-PCRAM memory architecture; leakage consumption; leakage power; nonvolatile memory; optimal page allocation approach; page segments; task-based approach; write power consumption; Educational institutions; Linear programming; Memory architecture; Phase change random access memory; Power demand; Resource management; DRAM; NVM; PCRAM; page allocation;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Next-Generation Electronics (ISNE), 2014 International Symposium on
  • Conference_Location
    Kwei-Shan
  • Type

    conf

  • DOI
    10.1109/ISNE.2014.6839333
  • Filename
    6839333