Analog low-voltage low-power CMOS circuit for learning Kohonen networks on silicon

The paper deals with hardware implemented Kohonen neural networks capable of fast learning on silicon. An analog network for calculating Euclidean distance is presented. The circuit is well suited to be used in competitive learning using a WTA (Winner Takes All) as well as WTM (Winner Takes Most) methods, where the Euclidean distance can be applied as a measure of similarity between two vectors. In our circuit, an idea of transconductance squaring [15], current-mode square-root extracting [16] and creating a Euclidean distance calculator in hardware [17] is utilized. Problems concerning a good cooperation between basic circuits of the calculator are discussed. As compared to the circuits of [15], [16] and [17], some important improvements have been introduced resulting, among others, in a considerably higher precision of the realized Euclidean distance calculations as well as wider range over which input voltages and output current can be varied. SPICE simulation results are shown to be in a good agreement with the theory presented.