Analysis of IBIS model performance in simulation of simultaneous switching noise

Author

Ji, Yuancheng ; Mouthaan, Koen ; Venkatarayalu, Neelakantam V.

Author_Institution

Dept. of Electr. & Comput. Eng., Nat. Univ. of Singapore, Singapore, Singapore

fYear

2011

Firstpage

1007

Lastpage

1010

Abstract

Input/Output Buffer Information Specification (IBIS) models are widely used in signal integrity analysis of digital devices. Advantages of using IBIS models include protection of proprietary information and reduction of simulation time. However, compared with Spice models, IBIS models have some inherent deficiencies, which can lead to inaccurate results in simultaneous switching noise (SSN) simulations. This paper investigates in detail how the deficiencies in the IBIS models translate to inaccurate results in SSN simulations. Methods to improve SSN are briefly discussed and validated. The investigations will be useful to further improve the accuracy of IBIS models and to enhance their wider acceptance.

Keywords

digital integrated circuits; integrated circuit modelling; integrated circuit noise; IBIS model performance analysis; SPICE models; SSN simulations; digital devices; digital integrated circuits; input-output buffer information specification model; proprietary information protection; signal integrity analysis; simulation time reduction; simultaneous switching noise simulation; Data models; Integrated circuit modeling; Logic gates; Noise; Rails; Solid modeling; Switches; IBIS; gate modulation effect; overestimation; simultaneous switching noise;

fLanguage

English

Publisher

ieee

Conference_Titel

Microwave Conference Proceedings (APMC), 2011 Asia-Pacific

Conference_Location

Melbourne, VIC

Print_ISBN

978-1-4577-2034-5

Type

conf

Filename

6173924