Title :
Exploiting high-performance DSP hardware for real-time CELP implementation
Author :
Teo, T.T. ; Tan, E.C. ; Premkumar, A. Benjamin
Author_Institution :
Sch. of Appl. Sci. & Comput. Eng., Nanyang Technol. Univ., Singapore
Abstract :
We describe our experience of implementing a CELP algorithm on a TMS320C44 digital signal processing board. The particular implementation we consider is the Federal Standard 1016 (FS1016) 4.8 Kbps CELP vocoder. Our main focus is on exploiting the high-performance architecture and the features of the DSP processor for possible real-time applications
Keywords :
code standards; digital signal processing chips; linear predictive coding; real-time systems; speech coding; telecommunication standards; vocoders; 4.8 kbit/s; CELP algorithm; Federal Standard 1016; TMS320C44 digital signal processing board; high-performance DSP hardware; high-performance architecture; real-time CELP implementation; real-time applications; vocoder; Decoding; Digital signal processing; Digital signal processors; Hardware; Instruments; Random access memory; Read-write memory; Signal processing algorithms; Speech coding; Speech processing;
Conference_Titel :
TENCON '97. IEEE Region 10 Annual Conference. Speech and Image Technologies for Computing and Telecommunications., Proceedings of IEEE
Conference_Location :
Brisbane, Qld.
Print_ISBN :
0-7803-4365-4
DOI :
10.1109/TENCON.1997.648206
