Title :
Implementation of module combining multiplication, division, and square root
Author :
Ercegovac, Milos D. ; Lang, Tomas
Author_Institution :
Dept. of Comput. Sci., California Univ., Los Angeles, CA, USA
Abstract :
The implementation of a module that performs radix-2 multiplication, division, and square root is presented. The module is compact because most of the components are shared by all three operations, the complexity being similar to that of a radix-2 divider. All three operations have the same execution time; one bit of the result is produced per cycle, beginning with the most significant bit. The cycle time is kept small by the use of carry-save addition and result-digit selection based on a low-precision estimate of the partial remainder. The module incorporates on-the-fly conversion and routing of the result
Keywords :
digital arithmetic; dividing circuits; multiplying circuits; carry-save addition; cycle time; low-precision estimate; module compactness; module implementation; most significant bit; on-the-fly conversion; on-the-fly routing; one result bit per cycle; operation component sharing; operation execution time; partial remainder; radix-2 divider complexity; radix-2 division; radix-2 multiplication; radix-2 square root; result-digit selection; Computer science; Gold; Pipelines; Read only memory; Tail;
Conference_Titel :
Circuits and Systems, 1989., IEEE International Symposium on
Conference_Location :
Portland, OR
DOI :
10.1109/ISCAS.1989.100314
