DocumentCode
1612965
Title
Isolation issues in smart power integrated circuits
Author
Charitat, G.
Author_Institution
Lab. d´´Autom. et d´´Anal. des Syst., CNRS, Toulouse, France
Volume
1
fYear
2002
fDate
6/24/1905 12:00:00 AM
Firstpage
15
Abstract
This paper analyses a major problem inherent to smart power integrated circuits employed with inductive loads, i.e. the rejection of carriers inside the substrate during switching off. Firstly, the physical mechanisms involved are presented as well as some solutions to minimize the perturbations inside the common substrate of the integrated circuit. Secondly, use of dielectrically isolated substrate to avoid the problem is critically assessed and leads to the conclusion that DI is not a perfect solution regarding the thermal dissipation and the switching speed.
Keywords
isolation technology; leakage currents; minority carriers; power integrated circuits; DI; carrier rejection; dielectrically isolated substrate; inductive loads; perturbations; physical mechanisms; smart power integrated circuits; switching speed; thermal dissipation; Dielectric devices; Dielectric substrates; Diodes; Integrated circuit technology; Isolation technology; Leakage current; Low voltage; Microelectronics; Power integrated circuits; Switching circuits;
fLanguage
English
Publisher
ieee
Conference_Titel
Microelectronics, 2002. MIEL 2002. 23rd International Conference on
Print_ISBN
0-7803-7235-2
Type
conf
DOI
10.1109/MIEL.2002.1003143
Filename
1003143
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