DocumentCode :
1613003
Title :
A VLSI design for fan adaptive sampling [ECG signal processing]
Author :
Bohs, L.N. ; Barr, R.C. ; Sacks, B. ; Krakow, W.T.
Author_Institution :
Dept. of Biomed. Eng., Duke Univ., Durham, NC, USA
fYear :
1989
Abstract :
A semicustom VLSI chip for real-time adaptive sampling has been designed. The chip executes the fan algorithm at a rate of about 1 μs per sample, an order of magnitude faster than a previous realization using general-purpose signal processing chips. This increased speed allows the use of higher peak sampling rates in acquiring cardiac signals with high-frequency components. In addition, the chip provides improved accuracy and extends the maximum number of consecutive redundant samples to 32 K compared to 256 for the prototype
Keywords :
VLSI; biomedical electronics; electrocardiography; signal processing; cardiac signals; consecutive redundant samples; fan algorithm; medical electronics; peak sampling rate; real-time adaptive sampling; Adaptive signal processing; Biomedical engineering; Biomedical signal processing; Electrocardiography; Prototypes; Sampling methods; Signal design; Signal processing algorithms; Signal sampling; Very large scale integration;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Engineering in Medicine and Biology Society, 1989. Images of the Twenty-First Century., Proceedings of the Annual International Conference of the IEEE Engineering in
Conference_Location :
Seattle, WA
Type :
conf
DOI :
10.1109/IEMBS.1989.95549
Filename :
95549
Link To Document :
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