The accumulation enhanced emitter switched thyristor - a novel area efficient power semiconductor device

For the first time, we demonstrate a new power semiconductor device called the accumulation enhanced emitter switched thyristor. The device combines MOS gate control with a thyristor to provide low conduction losses and current saturation at high gate voltages. This device is a volumetric structure which makes use of a floating n well to improve its area efficiency to be greater than that of an EST. The floating n well also forms an accumulation layer and a PMOS that is shown to enhance the on-state and turn-off performance.