DocumentCode
1613786
Title
Physical design and technology parameters for vertical system-in-package integration
Author
Polityko, David Dmitry ; Guttowski, Stephan ; John, Werner ; Reichl, Herbert
fYear
2005
Firstpage
413
Lastpage
419
Keywords
Integrated circuit interconnections; Monolithic integrated circuits; Packaging; Propagation delay; Routing; Substrates; System-on-a-chip; Transistors; Wires; Wiring;
fLanguage
English
Publisher
ieee
Conference_Titel
Electronics Technology: Meeting the Challenges of Electronics Technology Progress, 2005. 28th International Spring Seminar on
Print_ISBN
0-7803-9325-2
Type
conf
DOI
10.1109/ISSE.2005.1491064
Filename
1491064
Link To Document