DocumentCode :
1613921
Title :
The pseudoexhaustive test of sequential circuits
Author :
Wunderlich, Hans-Joachim ; Hellebrand, Sybille
Author_Institution :
Inst. of Comput. Design & Fault Tolerance, Karlsruhe Univ., West Germany
fYear :
1989
Firstpage :
19
Lastpage :
27
Abstract :
The concept of a pseudoexhaustive test for sequential circuits is introduced. Instead of test sets one applies pseudoexhaustive test sequences of a limited length, which provides well-known benefits as far as fault coverage, self-test capability, and simplicity of test generation are concerned. Some flip flops and latches are integrated into an incomplete scan path, such that each possible state of the circuit is reachable within a few steps. Some more flip flops and some new segmentation cells are added to the partial scan path in order to make a pseudoexhaustive test feasible. Algorithms for placing these devices automatically are presented. Also it is shown how to transform a pseudoexhaustive test set into a pseudoexhaustive test sequence of a similar size. The analyzed examples show that a conventional complete scan path without additional testability features requires more hardware overhead than the proposed test strategy, which retains all the known benefits of a pseudoexhaustive test
Keywords :
automatic testing; fault location; flip-flops; logic CAD; logic testing; sequential circuits; fault coverage; flip flops; hardware overhead; latches; logic CAD; logic testing; partial scan path; pseudoexhaustive test; segmentation cells; self-test; sequential circuits; test generation; Automatic testing; Circuit faults; Circuit testing; Fault detection; Feedback; Hardware; Sequential analysis; Sequential circuits; Silicon; Test pattern generators;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Test Conference, 1989. Proceedings. Meeting the Tests of Time., International
Conference_Location :
Washington, DC
Type :
conf
DOI :
10.1109/TEST.1989.82273
Filename :
82273
Link To Document :
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