Title :
Design parameter optimization for Hall sensor application
Author :
Choi, Chang-Sung ; Cha, Gi-Ho ; Kang, Hyun-Soon ; Song, Chang-Sup
Author_Institution :
New Technol. Team, Fairchild Korea Semicond., Kyonggi-Do, South Korea
fDate :
6/24/1905 12:00:00 AM
Abstract :
A Hall effect sensor using a 7 μm, 1.7 Ω-cm bipolar process was successfully developed. The Hall sensor consists of various patterns, such as regular shapes, rectangles, diamond, hexagon and cross shapes, to optimize offset voltage and sensitivity for proper applications. In order to measure offset voltage at chip scale, the Agilent 4156C and nano-voltage meter were used and the best structure in offset voltage terms was finally selected by using a ceramic package. The patterns appear to be quadri-rectangular patterns entirely and three-parallelogram patterns. The measured offset voltages were found to be about 173∼365 μV. Meanwhile, in the offset voltage, the standard deviation of the measured values is more important than the average value itself because the unfavorable offset voltages due to mainly misalignment between PISO and N+CONT can be easily overcome by the Hall IC fabrication with compensated processing circuitry. The standard deviation ranges from 78 to 188. The measured misalignment is about 0.32 μm. After measuring the offset voltages, we checked the sensitivity by using the Lakeshore electromagnetic field measurement tool. We selected the best patterns for the sensitivity. The measured sensitivities are about 11∼18 mV/gauss. Furthermore, thermal drift was measured with increasing temperature and the values showed linearity ranging from 0 °C to 120 °C.
Keywords :
Hall effect devices; bipolar integrated circuits; ceramic packaging; circuit optimisation; electric sensing devices; integrated circuit design; integrated circuit packaging; semiconductor device measurement; 0 to 120 C; 0.32 micron; 1.7 ohmcm; 7 micron; Agilent 4156C nanovoltage meter; Hall IC fabrication; Hall effect sensor IC; Hall sensor application; Hall sensor patterns; Lakeshore electromagnetic field measurement tool; bipolar process; ceramic package; compensated processing circuitry; design parameter optimization; offset voltage; offset voltages; parallelogram patterns; quadri-rectangular patterns; sensitivity; standard deviation; temperature linearity; thermal drift; Ceramics; Chip scale packaging; Design optimization; Electromagnetic measurements; Hall effect devices; Measurement standards; Semiconductor device measurement; Shape; Temperature measurement; Voltage measurement;
Conference_Titel :
Microelectronics, 2002. MIEL 2002. 23rd International Conference on
Print_ISBN :
0-7803-7235-2
DOI :
10.1109/MIEL.2002.1003192