DocumentCode :
1614239
Title :
A high performance coherent phase-locked synchronous oscillator
Author :
Ma, Zhigang ; White, Marvin H. ; Uzunoglu, Vasil
Author_Institution :
Sherman Fairchild Center for Solid State Studies, Lehigh Univ., Bethlehem, PA, USA
fYear :
1992
Firstpage :
1458
Abstract :
The authors present an optimum design approach for a 136-MHz coherent phase-locked synchronous oscillator (CPSO). They show the amplitude and phase characteristics measured with a network analyzer. A -17-dBm sweep signal was applied to the CPSO and a 5-MHz tracking bandwidth was observed. Within the tracking bandwidth, the output amplitude of the CPSO remained flat, the phase error was minimized, and the CPSO operated at its maximum noise rejection level
Keywords :
radiofrequency oscillators; synchronisation; 136 MHz; 5 MHz; coherent phase-locked; phase characteristics; synchronous oscillator; tracking bandwidth; Bandwidth; Clocks; Equations; Frequency conversion; Frequency synchronization; Signal design; Solid state circuits; Spread spectrum communication; Voltage; Voltage-controlled oscillators;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Circuits and Systems, 1992., Proceedings of the 35th Midwest Symposium on
Conference_Location :
Washington, DC
Print_ISBN :
0-7803-0510-8
Type :
conf
DOI :
10.1109/MWSCAS.1992.271021
Filename :
271021
Link To Document :
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