Embedded Tutorials

Development of EDA software is a moving target, there are four aims, towards which EDA software is developed: capacity & speed, modelling of effects, level of abstraction and ease of usage / shortening the response loop. Capacity and speed go along with Moores Law, all the devices of a design, number of which is doubling every 18 months, must be handled by EDA software at acceptable speed. Today this is only achievable by massive parallelisation of the engines. Cadence introduced Tempus, Voltus, Quantus software, which are massively parallelised. Nanometer technologies and high-speed designs require modelling of new effects. Sigrity from Cadence provides simulation of temperature, electro-magnetic emission, IR-drop, current density, noise level and so on, on board level, which was not possible before with this level of accuracy. Transaction modelling (TLM) is a new level of abstraction for creating and verifying a design. By writing transaction models and using Cadence CtoSilicon software the designer can concentrate on optimal implementation of the algorithm and explore different design options. Design flows usually contain loops, it is not possible for the implementer to get immediate feedback, if his decision was correct. Technologies like Virtuoso EAD, iPVS, LDE-simulation provide immediate feedback to implementer, so he can optimize the design and increase his productivity. Cadence became 4th largest IP provider. It offers numerous design IP and Verification IP blocks for different technology nodes. Recently Cadence acquired Tensilica, which offers configurable dataplane processor IP, which enables creation of highly optimized data-flow processors. Xtensa Processor Generator engine creates various models and files for hardware design, system modelling and software tools, which are tailored for the configurated processor.