DocumentCode :
1614283
Title :
Dynamic performance simulation of a flash converter
Author :
Setty, Palaksha ; Bliss, William G.
Author_Institution :
Crystal Semicond. Inc., Austin, TX, USA
fYear :
1992
Firstpage :
1450
Abstract :
Simulation of the dynamic performance of a flash analog-to-digital (A/D) converter is complicated due to the presence of many systematic and random dynamic errors. A simulation methodology is proposed where all of the dynamic errors in the converter are lumped into an effective timing uncertainty of the sampling clock. The effective timing uncertainty is a function of the signal dynamics, and completely characterizes the dynamic behavior of the converter. The signal-to-noise plus distortion ratio (SNDR) of an 8-bit bipolar converter was simulated using this methodology. The simulation results are presented
Keywords :
analogue-digital conversion; coding errors; simulation; SNDR; bipolar converter; dynamic performance; flash converter; performance simulation; random dynamic errors; sampling clock; simulation methodology; timing uncertainty; Clocks; Computational modeling; Distortion; Frequency conversion; SPICE; Semiconductor device noise; Signal resolution; Signal to noise ratio; Timing; Uncertainty;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Circuits and Systems, 1992., Proceedings of the 35th Midwest Symposium on
Conference_Location :
Washington, DC
Print_ISBN :
0-7803-0510-8
Type :
conf
DOI :
10.1109/MWSCAS.1992.271023
Filename :
271023
Link To Document :
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