Title :
Closed form aliasing probability for Q-ary symmetric errors
Author :
Edirisooriya, Geetani ; Edirisooriya, Samantha
Author_Institution :
Dept. of Electr. & Comput. Eng., Iowa Univ., Iowa City, IA, USA
Abstract :
In built-in self-test schemes multiple-input signature registers (MISRs) are often used to compact test data. The error escape probability during compaction determines the quality of the compactor. The authors derive closed-form expressions for exact aliasing probability under the Q-ary error model for a large class of MISRs. It is shown that for Q-ary symmetric errors, the circuit complexity and propagation delay can be minimized by using a set of m single-bit linear feedback shift registers without increasing the aliasing probability. This also leads to a regular register structure
Keywords :
binary sequences; built-in self test; data compression; errors; logic testing; probability; shift registers; Q-ary symmetric errors; aliasing probability; built-in self-test; circuit complexity; closed-form expressions; error escape probability; error model; multiple-input signature registers; propagation delay; regular register structure; single-bit linear feedback shift registers; test data compaction; Automatic testing; Built-in self-test; Circuit faults; Circuit testing; Compaction; Computer errors; Feedback; Logic circuits; Performance evaluation; Polynomials;
Conference_Titel :
Circuits and Systems, 1992., Proceedings of the 35th Midwest Symposium on
Conference_Location :
Washington, DC
Print_ISBN :
0-7803-0510-8
DOI :
10.1109/MWSCAS.1992.271030