DocumentCode :
1615139
Title :
Contradiction Analysis for Inconsistent Formal Models
Author :
Przigoda, Nils ; Wille, Robert ; Drechsler, Rolf
Author_Institution :
Group for Comput. Archit., Univ. of Bremen, Bremen, Germany
fYear :
2015
Firstpage :
171
Lastpage :
176
Abstract :
Modeling languages such as UML or SysML in combination with constraint languages such as OCL allow for an abstract description of a system prior to its implementation. But the resulting system models can be highly non-trivial and, hence, errors in the descriptions can easily arise. In particular, too strong restrictions leading to an inconsistent model are common. Motivated by this, researchers and engineers developed methods for the validation and verification of given formal models. However, while these methods are efficient to detect the existence of an inconsistency, the designer is usually left alone to identify the reasons for it. In this contribution, we propose an automatic method which efficiently determines reasons explaining the contradiction in an inconsistent UML/OCL model. For this purpose, all constraints causing the contradiction are comprehensibly analyzed. By this, the designer is aided during the debugging of his/her model.
Keywords :
SysML; Unified Modeling Language; formal verification; OCL; SysML; UML; contradiction analysis; inconsistent UML-OCL model; inconsistent formal models; modeling languages; Analytical models; Computational modeling; Debugging; Engines; Systems Modeling Language; Unified modeling language; Upper bound;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Design and Diagnostics of Electronic Circuits & Systems (DDECS), 2015 IEEE 18th International Symposium on
Conference_Location :
Belgrade
Print_ISBN :
978-1-4799-6779-7
Type :
conf
DOI :
10.1109/DDECS.2015.52
Filename :
7195693
Link To Document :
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