DocumentCode :
1615149
Title :
Defect gallery and bump defect reduction in the self Aligned Double Patterning module
Author :
Cai, Cathy ; Padhi, Deenesh ; Seamons, Martin ; Bencher, Chris ; Ngai, Chris ; Kim, B.H.
Author_Institution :
Appl. Mater. Inc., Santa Clara, CA, USA
fYear :
2010
Firstpage :
129
Lastpage :
132
Abstract :
The Self Aligned Double Patterning (SADP) module is one scheme to form 3X or 2X line structures by using a dry scanner or immersion scanner. After reliable processes are developed, defect data collection, understanding, characterization, and reduction become important. The learning we obtained at the Mayden Technology Center at Applied Materials reduced ramp time at our customer sites and provided new directions to improve our processes. In this paper, the defect type and evaluation per process to the final 3X or 2X structures in SADP flow are discussed. An in-depth study of the impact of bump defects, bump formation, and a potential solution involving an improved film deposition process are presented.
Keywords :
coating techniques; immersion lithography; integrated circuit manufacture; bump defect reduction; defect gallery; dry scanner; film deposition process; immersion scanner; self aligned double patterning module; Dielectrics; Films; Inspection; Strips; Surface treatment;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Advanced Semiconductor Manufacturing Conference (ASMC), 2010 IEEE/SEMI
Conference_Location :
San Francisco, CA
ISSN :
1078-8743
Print_ISBN :
978-1-4244-6517-0
Type :
conf
DOI :
10.1109/ASMC.2010.5551437
Filename :
5551437
Link To Document :
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