Weight storage elements for analog implementation of artificial neural networks

Novel switched-capacitor (SC) circuits for storing analog weight voltages for use in the CMOS VLSI realization of analog artificial neural networks (ANNs) are presented. The circuits are dynamic in operation requiring low clock rates and operate by compensating for the leakage currents that are always present in CMOS devices. In addition, weight voltages can be changed in a manner similar to that used by neural networks that use supervised learning algorithms. The proposed circuits provide a medium-long-term-type plastic storage for ANNs and represent a significant move toward analog memories with on-chip learning over conventional short-term dynamic-RAM-type analog storage using a standard CMOS process