Title :
Low-Vt small-offset gated preamplifier for sub-1V gigabit DRAM arrays
Author :
Akiyama, Satoru ; Sekiguchi, Tomonori ; Takemura, Riichiro ; Kotabe, Akira ; Itoh, Kiyoo
Author_Institution :
Hitachi, Kokubunji
Abstract :
A sensing scheme with temporary activation of a low-V, gated preamplifier (LGA) achieves fast sensing, fast local I/O driving and low-leakage operation simultaneously even for low-voltage mid-point sensing. The features are verified with a 70 nm 128 Mb DRAM core that demonstrates 16.4 ns row access (tRCD) and 14.3 ns read access (tM) at an array voltage of 0.9 V. The LGA is promising for future sub-1 V gigabit DRAMs because it reduces variation in threshold voltage (Vt) of MOSFETs and in the offset voltage of sense amplifiers.
Keywords :
DRAM chips; MOSFET; preamplifiers; DRAM core; MOSFET; gigabit DRAM array; low-leakage operation; low-voltage mid-point sensing; low-voltage small-offset gated preamplifier; read access; row access; size 70 nm; storage capacity 128 Mbit; time 14.3 ns; time 16.4 ns; voltage 0.9 V; Clocks; Impurities; MOSFETs; Preamplifiers; Random access memory; Switches; Testing; Threshold voltage; Turning;
Conference_Titel :
Solid-State Circuits Conference - Digest of Technical Papers, 2009. ISSCC 2009. IEEE International
Conference_Location :
San Francisco, CA
Print_ISBN :
978-1-4244-3458-9
DOI :
10.1109/ISSCC.2009.4977348
