Increasing Manufacturing Yield Using Partially Programmable Circuits with CLB Implementation of Incompletely Specified Boolean Function of the Corresponding Sub-Circuit

The new approach to partially programmable circuit design that allows masking arbitrary gate faults of a logical circuit is considered. It is supposed that only one gate may be fault. There are reserved Configurable Logic Blocks (CLBs) based on Look Up Tables (LUTs) that may mask a gate fault. The suggested approach in comparison with the currently in use ones allows masking any gate fault but not the certain stuck at faults at the gate poles.