Title :
An ultra low-power 24 GHz Phase-lock-loop with low phase-noise VCO embedded in 0.18 µm CMOS process
Author :
Lin, Yu-Hsuan ; Tsai, Jeng-Han ; Kuo, Yen-Hung ; Huang, Tian-Wei
Author_Institution :
Dept. of Electr. Eng., Nat. Taiwan Univ., Taipei, Taiwan
Abstract :
A 24 GHz 29.8 mW Phase-lock-loop using 0.18 μm CMOS technology is presented in this paper. To achieve the low-power issue and low phase-noise performance, a transformer feedback voltage control oscillator and a cascoded divider of injection-locked frequency divider and current mode logic divider for low voltage and low power are implemented. The phase-lock-loop phase noise was measured by -122 dBc/Hz at 10 MHz offset with low supply voltage and equipped the locking range of 20.80-23.37 GHz. The PLL dissipate 29.8 mW (only 13.3 mW in VCO + ILFD) and occupies the total area of 0.39 mm2 without off-chip loop filter.
Keywords :
CMOS integrated circuits; feedback; frequency dividers; phase locked loops; phase noise; transformers; voltage-controlled oscillators; CMOS process; PLL; cascoded divider; current mode logic divider; frequency 24 GHz; injection-locked frequency divider; low phase-noise VCO; off-chip loop filter; power 29.8 mW; size 0.18 mum; transformer feedback voltage control oscillator; ultra low-power phase-lock-loop phase noise; voltage supply; CMOS integrated circuits; Frequency conversion; Frequency measurement; Phase locked loops; Phase noise; Solid state circuits; Voltage-controlled oscillators; CMOS; Injection-Locked Frequency Divider(ILFD); Phase-Lock-Loop (PLL); VCO;
Conference_Titel :
Microwave Conference Proceedings (APMC), 2011 Asia-Pacific
Conference_Location :
Melbourne, VIC
Print_ISBN :
978-1-4577-2034-5
