Improved I/O pad assignment for sea-of-gates placement algorithm

Author

Chrzanowska-Jeske, Malgorzata ; Her, Shyang-Kuen

Author_Institution

Dept. of Electr. Eng., Portland State Univ., OR, USA

fYear

1992

Firstpage

1396

Abstract

A new method to improve the input/output (I/O) pad positioning assignment for a placement algorithm based on a resistive network optimization model is proposed. In the sea-of-gates placement program, the preplaced I/O pads are used as boundary conditions in solving sparse linear equations to obtain the module placement. The objective of the pad assignment is to assign I/O pad positions, based on connectivity information, so that the resulting optimized module arrangement will minimize the cost function defined in this case as the total wire length. The pad assignment program is used as a processor for the sea-of-gates placement package PROUD. The results have revealed excellent improvement

Keywords

application specific integrated circuits; circuit layout CAD; digital integrated circuits; integrated circuit technology; CAD; I/O pad assignment; PROUD; SOG layout; boundary conditions; connectivity information; cost function; module placement; placement algorithm; resistive network optimization model; sea-of-gates; sparse linear equations; total wire length; Atherosclerosis; Boundary conditions; Cost function; Equations; Macrocell networks; Optimization methods; Packaging; Routing; Shape; Wire;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems, 1992., Proceedings of the 35th Midwest Symposium on

Conference_Location

Washington, DC

Print_ISBN

0-7803-0510-8

Type

conf

DOI

10.1109/MWSCAS.1992.271078

Filename

271078