CAE functionality for verification of diagnostic programs

Author

Pyron, Carol ; Sallade, Rex

Author_Institution

Texas Instrum. Inc., Plano, TX, USA

fYear

1989

Firstpage

94

Lastpage

102

Abstract

A feasibility study that has identified computer-aided engineering (CAE) features and a methodology approach that will support BIT (built-in-test) verification through fault simulation are described. With an example, the authors illustrate the evolutionary fault simulation features and the attendant methodology to support BIT verification by simulation. The simulator functionality and methodology will support the complex simulation of an embedded BIT program. These enhancements can also be effective in verification of ATE (automatic test equipment) functional tests for higher density integrated circuits and boards

Keywords

CAD/CAM; automatic test equipment; automatic testing; digital simulation; electronic engineering computing; fault location; integrated circuit testing; printed circuit testing; ATE; BIT verification; CAE; CAE functionality; IC testing; PCB testing; automatic test equipment; built-in-test; computer-aided engineering; embedded BIT program; fault simulation; feasibility study; functional tests; verification of diagnostic programs; Automatic test equipment; Automatic testing; Circuit faults; Circuit simulation; Circuit testing; Computational modeling; Computer aided engineering; Computer simulation; Fault diagnosis; Integrated circuit testing;

fLanguage

English

Publisher

ieee

Conference_Titel

Test Conference, 1989. Proceedings. Meeting the Tests of Time., International

Conference_Location

Washington, DC

Type

conf

DOI

10.1109/TEST.1989.82282

Filename

82282