Title :
High reliability Cu interconnection utilizing a low contamination CoWP capping layer
Author :
Ishigami, Takashi ; Kurokawa, T. ; Kakuhara, Y. ; Withers, B. ; Jacobs, J. ; Kolics, A. ; Ivanov, I. ; Sekine, M. ; Ueno, K.
Author_Institution :
NEC Electron. Corp., Sagamihara, Japan
Abstract :
Copper (Cu) damascene interconnects with a cobalt tungsten phosphorus (CoWP) capping layer were developed using an alkaline-metal-free electrodes plating process without palladium (Pd) catalyst activation. The wafer contamination level after processing is consistent with requirements for present LSI fabrication lines. Within wafer CoWP deposition uniformity is high and interconnects wire resistance increases by less than 5% after deposition. Electromigration (EM) testing shows no failures after two thousand hours and stress induced voiding (SIV) testing shows no failure after three thousand hours. This EM result is a 2 order or magnitude improvement over a non CoWP process.
Keywords :
cobalt alloys; copper; electroless deposition; electromigration; integrated circuit interconnections; integrated circuit testing; surface contamination; voids (solid); 2000 hours; 3000 hours; CoWP; Cu; LSI fabrication; alkaline-metal-free electrodes plating process; copper damascene interconnects; electromigration test; high reliability Cu interconnection; interconnects wire resistance; low contamination CoWP capping layer; palladium catalyst activation; stress induced voiding test; wafer CoWP deposition; wafer contamination level; Cobalt; Contamination; Copper; Electrodes; Fabrication; Large scale integration; Palladium; Testing; Tungsten; Wire;
Conference_Titel :
Interconnect Technology Conference, 2004. Proceedings of the IEEE 2004 International
Print_ISBN :
0-7803-8308-7
DOI :
10.1109/IITC.2004.1345691
