Title :
Performance of a fast analog VLSI implementation of the DFT
Author :
Buchanan, B. ; Madisetti, V. ; Brooke, M.
Author_Institution :
Georgia Inst. of Technol., Atlanta, GA, USA
Abstract :
A fast, analog implementation of the discrete Fourier transforms and inverse discrete Fourier transforms (DFT/IDFTs) requires solutions to the problems of input/output (I/O) bottleneck encountered by large, parallel input sequences, the slow execution time of long sequential sequences, and the resultant error. The authors present an architecture based on several modifications to G. Goertzel´s algorithm (GA) (1958) that provides balances between input serialization, circuit area, execution time, and output error. Such an implementation of a DFT/IDFT based on GA requires only four multipliers, three adders, and two sample and hold circuits
Keywords :
VLSI; analogue processing circuits; fast Fourier transforms; DFT; circuit area; discrete Fourier transforms; execution time; fast analog VLSI implementation; input serialization; inverse DFT; multipliers; output error; sample/hold circuits; three adders; Adders; Analog circuits; Analog processing circuits; Concurrent computing; Digital signal processing; Discrete Fourier transforms; Integrated circuit interconnections; Signal processing algorithms; Signal representations; Very large scale integration;
Conference_Titel :
Circuits and Systems, 1992., Proceedings of the 35th Midwest Symposium on
Conference_Location :
Washington, DC
Print_ISBN :
0-7803-0510-8
DOI :
10.1109/MWSCAS.1992.271089
