10Gb/s receiver with track-and-hold-type linear phase detector and charge-redistribution 1st-order ΔΣ modulator

A 10 Gb/s receiver, which is equipped with a track-and-hold-type linear phase detectors (LPD) as well as charge redistribution DeltaSigma modulator for incorporation in a digital clock and data recovery (CDR), is described. The 10 Gb/s receiver exhibited low quantization errors and high loop bandwidth that are due to the use of LPD while it maintains the advantages of a digital CDR circuit such as low power consumption, small area occupation, fast locking time, and low-jitter recovered clock. Results also reveal that the tracking bandwidth of the CDR circuit is about 20 MHz, and the power consumption of the receiver is 65 mW.